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DESIGN AND ANALYSIS OF BIT INTERLEAVED CODED SPACE-TIME MODULATION

Platform : vlsi

IEEE Projects Years : 2003

This paper appears in: Communications Letters, IEEE Issue Date: Dec. 2003 AIM: IMPLEMENTATION OF CSTM VIA VHDL ABSTRACT We investigate bit-interleaved coded modulation with iterative decoding (BICM-ID) for bandwidth efficient transmission, where the bit error rate is reduced through iterations between a multilevel demapper and a simple channel decoder. In order to achieve a significant turbo-gain, the assignment strategy of the binary indices to signal points is crucial. We address the problem of finding the most suitable index assignments to arbitrary, high order signal constellations. A new method based on the binary switching algorithm is proposed that finds optimized mappings outperforming previously known ones LEARNING OBJECTIVE: To understand about Coded Space Time Modulation via VHDL INPUT: Data / information about Coded Space Time Modulation OUTPUT : Simulated output of Coded Space Time Modulation via VHDL APPLICATIONS: Very high speed integrated circuit hardware description language design, VLSI Design SOSFTWARE TOOL USED: XLINX81I

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