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AHB BUS IMPLEMENTATION

Platform : vlsi

IEEE Projects Years : 2005

This paper appears in: System-on-Chip for Real-Time Applications, 2005. Proceedings. Fifth International Workshop on Issue Date: 20-24 July 2005 AIM: IMPLEMENTATION OF AHB BUS ABSTRACT Recently, embedded systems design focuses on low-power dissipation and system-on-chip. Thus, ARM processor and AHB came to be popular in embedded systems. Whereas the bus has many advantages for high-performance modules, it has limitations on interfacing with low-speed devices. Therefore, a bridge is necessary between them. Although AHB-to-APB bridge is a standard in AMBA system, it is not useful because of the fixed interfacing speed. Moreover, it is difficult that the existing IP cores for the peripheral controllers are reused with APB. In this paper, we suggest more general and flexible bridge than the existing one for SoC. LEARNING OBJECTIVE: Operational issues of data transmission via AHB bus. INPUT: Data/ Information code which is to be transmitted via AHB bus. OUTPUT : Optimized reception of data via AHB bus. APPLICATIONS: Very high speed integrated circuit hardware description language design. SOFTWARE TOOL USED: XLINX8.1I

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